ASML Sold Out to 2027: High NA Allocation, CoWoS & NOR Flash Crunch

Jamie Cole (0:00)

AI Hardware & Chips, Daily News. I'm Jamie Cole, thanks for joining me.

Today, the 2028 Capacity Crunch. Who gets ASML High NA machines? NSML is sold out through 2027, and the scramble for 2028 delivery slots is already reshaping the Foundry Power Rankings. That's the clearest signal in the semiconductor industry right now.

High NA EUV machines, priced at $400 million each, are the single most critical tool in next-generation chip manufacturing. There aren't enough of them. And the companies that secure early allocation will have a structural lead that's genuinely difficult to recover from.

ASML is targeting deliveries of over 110 High NA machines in 2028 The CFO has confirmed the binding constraint isn't the supply chain anymore. It's assembly speed. ASML can't build them faster than it currently is. That's a hard ceiling on how many chips the world's most advanced fads can produce, regardless of how much capital anyone is willing to commit. The adoption timeline now looks like this. TSMC is committed to High NA in 2030 Samsung and SK Hynix are both targeting 2028 Intel is already running High NA in production, having processed over 1 million wafers on the platform. The important distinction there is timing versus ambition. Samsung and SK Hynix are targeting memory production on High NA, which is an aggressive core. If yield-rample throughput underperform, the return on that $400 million investment gets pushed out by a year or more. That's not a small risk at that price point compared to standard EUV at $200 million. TSMC's later 2030 commitment for High NA reflects a different calculation. At 2 nanometers, TSMC is already expanding hard. Monthly wafer starts are moving from 90,000 to 110,000. By the first half of 2027, a 22% increase.

At 3 nanometers, capacity is jumping from 180,000 to 210,000 wafer monthly. A 70% expansion across new lines in Taiwan, Arizona and Japan. Here's the thing. That tells us TSMC is betting its current no-transitions will carry it through the late 2020s, without needing High NA urgently. The $60-64 billion annual CapEx program backs that confidence. There's a second bottleneck that doesn't get the same attention, but matters just as much for AI hardware output. Advanced packaging. TSMC's CoWoS process, which stacks chips for Nvidia's GPU products, is still constrained. TSMC is targeting 260,000 units per month by end of 2028, with expansion underway in Chiayi and Arizona.

But that target is still years out, and Nvidia's dependency on CoWoS makes it a genuine single point of failure in the AI chip supply chain. One constraint that's emerged separately from logic chips is NOR flash memory. AI servers consume three to five times more NOR flash than standard servers.

That demand surge wasn't fully priced into supply planning, and the result is price spikes of 90 to 110 percent expected in the second half of 2026

High capacity 256 megabit chips are on track to double in cost.

Efforts to close the gap, including outsource production from GigaDevices and Winbond's 45 nanometer ramp, aren't moving fast enough to prevent a real squeeze through the rest of this year, and into 2027 The key implication across all of this is that AI infrastructure constraints are no longer abstract. They're specific, they're dated, and they're already being priced in. The companies that locked in ASML High NA slots earliest hold real leverage. The foundries that hit their packaging and wafer targets on schedule will define where AI compute capacity actually lives by 2028 Watch for any ASML order book updates, yield reports from Samsung's High NA ramp, and the TSMC's CoWoS expansion timeline holds. Those three signals will tell you more about the AI hardware race than any GPU announcement. Thanks for listening. This podcast was built using AI technology. A YesWe production.