The Thermodynamic AI Computing Chip - Thomas Ahle artwork

The Thermodynamic AI Computing Chip - Thomas Ahle

Machine Learning Street Talk (MLST)

June 28, 2026

Thomas Ahle wants Normal Computing to be the Lovable for chip design: type your intent, and a swarm of agents carries it from design through optimisation, formalisation and verification to tape-out.
Speakers: Thomas Ahle, Tim
**Thomas Ahle** (0:00)
Yeah, so why not try and build a chip that's just inherently random?

**Tim** (0:04)
Meet Thomas Ahle. I caught up with him in Zurich, and he's one of these rare galaxy brain people who's comfortable in probabilistic machine learning, formal verification and chip design.
However, there's a small problem. When the token god hands you something that looks like it works, how do you know it's actually right?

**Thomas Ahle** (0:28)
So, my background is in Theoretical Computer Science. I used to do algorithms for high-dimensional data, locality-sensitive hashing. Then I moved to Normal Computing to develop Thermo Computing, also to speed up Bayesian intelligence. Sometimes I think about it as the lovable for chip design. So we take it all the way from your intent through the design, through optimizing your design, to formalizing and verifying your design, all the way to tape out.

**Tim** (0:52)
Now, I didn't fully appreciate this before. These days, a chip doesn't necessarily start in a factory. It can start as code.
So engineers design the whole circuit in a language called Verilog, almost written like software. And only much later does any of it become physical silicon. But first, that code has to be simulated and formally verified. It has to be proven correct. Because once a chip is fabricated, if there are any bugs, you're in big trouble.
So a few months ago, Thomas blogged about building a Verilog simulator using a swarm of AI agents collaborating with each other. And it generated over half a million lines of code in 43 days. Now, the reason he needed to do this is that commercial software costs a ridiculous amount of money and isn't very friendly to using agents. $10,000 per seat or something.

**Thomas Ahle** (1:48)
Yeah, per for one CPU kernel.

**Tim** (1:50)
If an AI can generate a chip design or a proof or a working program, how do you know it's actually correct?

**Thomas Ahle** (1:58)
The percentage of tests that it got right or like even like the fable, it was like, oh, yeah, it got like 70, 80% tests correct. And it's like, yeah, but I talked with the people who made the benchmark and like, yeah, but did it get any of them actually right, you know?

**Tim** (2:11)
Now, in chip design, noise is the enemy. Manufacturers spend a fortune getting rid of it. But in thermodynamic computing, the opposite is kind of true. The noise is the computation. It comes straight out of probabilistic machine learning, which already runs on randomness and uncertainty. And thermodynamic computing tries to make the chip itself a stochastic differential equation.
Let the chip's own noise settle into place, and then it can land on answers that would normally cost a fortune to compute.

**Thomas Ahle** (2:47)
And then you infuse all of this noise, and it will start to behave according to these stochastic differential equations. It actually behaves sort of according to the inverse of that matrix.

**Tim** (3:01)
They've already released their first version of this technology. It's a chip called Cn101, all the way to silicon. It's still early days, and it's aimed at a fairly narrow band of probabilistic workloads. But the real test is what can the benchmarks say once they scale this up. And something of huge interest to us at MLST is, if we're going to let AI build everything, what kind of understanding do we actually keep in the overall process?

**Thomas Ahle** (3:28)
It's not just that it's getting smarter, it's also that humans are getting dumber.

**Tim** (3:33)
Now, I should disclose that Normal Computing very kindly offered to cover our production and travel costs for this show, but we kept full editorial control.

**Thomas Ahle** (3:41)
These are tools for device manufacturing.
It's compilers for RTL.
RTL is the programming languages you use. If you're building a new chip, you typically don't draw all the different gates and so on. You write it in programming language like Verilog, which has constructs that are quite, it's like a super parallel programming language, which have a lot of constructs that map well to hardware. But then, there are actually no good open source compilers for this system. So the whole hardware industry, it doesn't have the same open source feeling as like software, where all the good stuff is free and there's like this big vibrant market of tools here. It's much more locked down to like big providers. But people then, yeah, they compile this too and they get like a netlist. They can start building their schematics. They can also look at it. You get like these giant things that you can eventually send to the FEP. But yeah, so this, but they also need to do like do simulations, for example, for testing. You can do like formal verification.

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