How Chiplet Design Is Reshaping Semiconductor Profit Margins
Semiconductor News with Fexingo: Chips, Foundries, and the Global Semiconductor Industry
September 12, 2026
As semiconductor manufacturing costs skyrocket, the industry is pivoting from monolithic dies to chiplet architectures. We explore how breaking large processors into smaller, reusable modules allows companies like NVIDIA and Intel to improve yield rates and reduce design time.
Speakers Fexingo
TopicsBusiness
Fexingo (0:01)
The semiconductor industry is hitting a wall that has nothing to do with demand and everything to do with physics.
We are seeing a fundamental shift away from trying to build one massive, perfect piece of silicon-tored assembling chips from smaller specialized modules. This is the rise of the chiplet.
SPEAKER_2 (0:19)
Right, because the cost of shrinking transistors on a single monolithic die is becoming prohibitive for even the biggest flares. You are talking about yield rates dropping so low that a single defective spot ruins an entire expensive processor.
Fexingo (0:35)
Exactly, and this isn't just a theoretical exercise anymore. Look at the market data from today.
Nvidia is trading around $218, and while their stock dipped 5% recently, their underlying hardware strategy is clearly leaning into this modular approach. Meanwhile, Intel is pushing hard on its own packaging technology to compete.
SPEAKER_2 (0:58)
It makes sense when you look at the capital expenditure required for advanced nodes. If you can buy pre-verified logic blocks from different vendors and stitch them together, you save years of development time.
Fexingo (1:10)
That is the core thesis here. The industry is moving from a bigger is better mentality to a better assembled is better reality. The key enabler is a standard called UCIE, which stands for Universal Chiplet Interconnect Express.
It's basically the USB-C of internal chip communication, allowing different pieces of silicon to talk to each other efficiently.
SPEAKER_2 (1:35)
So, instead of designing one giant custom interface for every new chip, companies can use standardized connectors? That sounds like a massive efficiency play for R&D budgets.
Fexingo (1:47)
Precisely, and this brings us to a quick note on how we keep this show running. If today's deep dive into chip architecture gave you something usable for your investment research, consider supporting the Fexingo network. Listener contributions help us maintain ad-free access and fund the rigorous reporting you hear here. You can find us at buymeacoffee.com/fexingo.
Thanks for keeping this independent journalism alive.
SPEAKER_2 (2:14)
Appreciate it. Back to the silicon, because if UCIE becomes the dominant standard, it changes who wins in the supply chain. It's no longer just about who makes the best transistor, it's about who designs the best system.
Fexingo (2:29)
That is a crucial distinction. Historically, companies like Intel or IBM designed their entire stack vertically. But with chiplets, you can source memory from one place, logic from another, and IO controllers from a third.
It fragments the monopoly power of traditional fabels giants.
SPEAKER_2 (2:49)
But doesn't that fragmentation introduce latency issues? If you are stitching together different types of silicon, aren't you losing performance compared to a monolithic design?
Fexingo (2:59)
You used to, but the gains in yield and cost savings now outweigh the minor penalties in latency for many applications. Think about AI training. You don't need every part of the GPU to run at the exact same clock speed.
You need massive bandwidth between memory and compute. Chiplets allow you to optimize that specific pathway without paying for unused logic elsewhere on the die.
SPEAKER_2 (3:24)
So it's about optimizing for the bottleneck, not maximizing raw speed across the board. That's a smarter way to allocate capital in a high interest rate environment.
Fexingo (3:34)
Spot on. And let's look at the players involved. AMD was actually an early adopter of this with their Ryzen processors, using small chiplets to boost core counts. But now Nvidia and Intel are following suit at the data center scale. The S&P 500 tech sector is up 1.4% today, driven largely by these efficiency plays rather than pure hype.
SPEAKER_2 (3:59)
It's interesting that AMD is ahead here. They've been using chiplets for consumer CPUs for years. Does that give them a structural advantage over Intel in the server market right now?
Fexingo (4:10)
They have the experience, but Intel has the manufacturing muscle.
Intel is betting heavily on its advanced packaging technology to integrate these chiplets. Their stock is up 7.5% over the last week, suggesting investors are buying the narrative that they can execute this transition successfully.
SPEAKER_2 (4:31)
And what about the foundries?
TSMC is still the king of advanced nodes. How does this shift affect their dominance?
Fexingo (4:40)
It actually strengthens TSMC's position in some ways. Even if you are using chiplets, the most critical ones, the AI accelerators, are still being made on the most advanced nodes at TSMC.
The company trades at $433 today, showing steady resilience. They are the gateway to the highest-performance silicon.
SPEAKER_2 (5:02)
So the foundry model isn't dying. It's evolving.
You still need the best lithography for the core components, even if the rest of the chip is assembled elsewhere.
Fexingo (5:12)
Correct. And this creates a new layer of complexity for suppliers. Companies like ASML, which makes the EUV lithography machines, remain critical. But packaging houses are gaining importance too.
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